Work — Aditya Pola

an envelope. for business, i guess.

a briefcase. mostly holds anxiety and some papers.

a chip. billions of transistors, one existential crisis.

a punch card. storage before transistors, one hole at a time.

a bus. for interconnects, scheduling analogies, and morning commutes.

Papers Research papers and writings.

[pdf] Exploiting Saccadic Suppression for Zero-Perceptual-Cost System Optimization [wip]
[pdf] Exploiting Spatial Attention Patterns in Screen-Based Tasks for Zero-Perceptual-Cost System Optimization [wip]

* [repo] Superscalar Out-of-Order RISC-V Core
* [repo][demo] Hardware-Accelerated Pipelined Video Processor
* [repo][test][demo] Real-Time Video Stabilization for Embedded Systems
[repo] CPU Microarchitecture Explorer: Automated gem5 Benchmarking & ML-Driven Performance Prediction
[repo] Real-Time Distributed Edge Computing Pipeline: FPGA-Jetson Visual-Inertial Sensor Fusion and 3D Pose Estimation [wip]
[repo] Custom Embedded Linux Platform on NVIDIA Jetson Orin Nano [wip]
[repo] Multi-Node CAN Motor Control Network
[repo][demo] Scriptable Animated Video Framework for Engineering Visualizations
[repo] Robotic Path Planning & Motion Profile Generator
[repo] IBM-437 FPGA Per-Character Color Text Renderer (MicroBlaze SoC)
[demo] Fully Analog Obstacle-Avoidance Robot with Circuit-Based Steering
[repo] Graphics Library for Embedded Systems
[repo] Personal Portfolio — Static Astro Site
[repo] Full-Stack Robotics Online Judge with Firebase Integration & Server-Side Grading Engine

coming soon